A Field Effect Transistor (FET) is a semiconductor device that controls the electrical conductivity between a source of electric current (source) and a destination of the electrical current (drain). The FET uses a semiconductor structure called a “gate” to create an electric field, which controls the shape and consequently the electrical conductivity of a channel between the source and the drain. The channel is a charge carrier pathway constructed using a semiconductor material.
Many semiconductor devices are planar, i.e., where the semiconductor structures are fabricated on one plane. A non-planar device is a three-dimensional (3D) device where some of the structures are formed above or below a given plane of fabrication.
A fin-Field Effect Transistor (finFET) is a non-planar device in which a source and a drain are connected using a fin-shaped conducting channel (fin). A finFET can be a horizontal channel device or a vertical channel device A horizontal channel device is a device in which the lateral running direction of the channel is substantially parallel to the plane of fabrication, e.g., the plane of the substrate material. A vertical channel device is a device in which the lateral running direction of the channel is substantially orthogonal to the plane of fabrication.
Generally, a finFET is fabricated as a multi-gate device in which two or more gates are coupled using one or more fin structures by connecting a drain of one gate to the source of another gate using a fin. For example, a fin of a finFET is usually fabricated between two gates such that the source of one gate is on one end of the fin and the drain of the other gate is on an opposite end of the fin. The direction along the lateral length of the fin running from one gate to the other gate is referred to herein as a lateral running direction of the fin.
The illustrative embodiments are described using a finFET as a non-limiting example of a fin channel device contemplated within the scope of the illustrative embodiments. An embodiment can be adapted to strain a fin in a manner described herein in other devices where fin structures are used. Such adaptations are contemplated within the scope of the illustrative embodiments.
For the purposes of the illustrative embodiments, the orientation of the device is described in a three-dimensional space using X, Y, and Z coordinate system. The plane of fabrication is assumed to be the X-Z plane, with vertical structures above the fabrication plane extending in +Y direction and the vertical structures below the fabrication plane extending in −Y direction. This example orientation is not intended to be limiting. From this disclosure, those of ordinary skill in the art will be able to conceive other orientations of semiconductor devices in which an embodiment described herein can be adapted, and such alternate orientations and adaptations are contemplated within the scope of the illustrative embodiments.